// Basic full adder module.
module full_adder
(
  input  a,
  input  b,
  input  cin,
  output sum,
  output cout
);

assign sum = a ^ b ^ cin;
assign cout = (a & b) | ((a^b) & cin);

endmodule


// Ripple carry adder.
module rca 
(
 input [3:0] A,
 input [3:0] B,
 output [3:0]  sum
 );

wire [4:0]       carry_out;

full_adder fa0(.a(A[0]),.b(B[0]),.cin(1'b0),
 	       .cout(carry_out[1]),.sum(sum[0]));
full_adder fa1(.a(A[1]),.b(B[1]),.cin(carry_out[1]),
 	       .cout(carry_out[2]),.sum(sum[1]));
full_adder fa2(.a(A[2]),.b(B[2]),.cin(carry_out[2]),
 	       .cout(carry_out[3]),.sum(sum[2]));
full_adder fa3(.a(A[3]),.b(B[3]),.cin(carry_out[3]),
 	       .cout(carry_out[4]),.sum(sum[3]));

endmodule

// Performs the operation A-B
module sub_4bit
(
 input  [3:0] A,
 input  [3:0] B,
 output [3:0] diff
 );

wire [3:0]     B2Comp;

rca twocomp
(
 .A(~B),
 .B(4'b1),
 .sum(B2Comp)
 );

rca subtract
(
 .A(A),
 .B(B2Comp),
 .sum(diff)
 );
  
endmodule  
  
`define TEST_N 4
module tb_rca;

integer A;
integer B;
wire [`TEST_N:0] sum;

integer    error_cnt;

rca dut
(
 .A(A),
 .B(B),
 .sum(sum)
 );

initial begin
  error_cnt = 0;
  for(A=0;A<(1'b1<<`TEST_N);A=A+1) begin
    for(B=0;B<(1'b1<<`TEST_N);B=B+1) begin
      #10 $display("A=%d B=%d sum=%d",A,B,sum);
      if (sum != A+B ) error_cnt = error_cnt + 1;
    end
  end
  $display("simulation done with %d errors",error_cnt);
  
  $stop;

end

endmodule

`define TEST_N 4
module tb_sub;

integer A;
integer B;
wire [`TEST_N-1:0] diff;


integer    error_cnt;

sub_4bit dut
(
 .A(A),
 .B(B),
 .diff(diff)
 );

initial begin
  error_cnt = 0;
  for(A=0;A<(1'b1<<(`TEST_N-1));A=A+1) begin
    for(B=0;B<(1'b1<<(`TEST_N-1));B=B+1) begin
      #10 $display("A=%d B=%d diff=%x",A,B,{{(32-`TEST_N){diff[`TEST_N-1]}},diff});
      
      
      if ({{(32-`TEST_N){diff[`TEST_N-1]}},diff} !== A-B ) begin 
	error_cnt = error_cnt + 1;
	$display("ERROR: A-B: %x diff=%x",A-B,{{(32-`TEST_N){diff[`TEST_N-1]}},diff});
      end
    end
  end
  $display("simulation done with %d errors",error_cnt);
  
  $stop;

end

endmodule